In recent years, monolithic integration of a gate driver has been developed for the purpose of cost reduction. In the monolithic integration, the gate driver is formed with use of amorphous silicon on a liquid crystal panel. The term “monolithic gate driver” is also associated with the terms such as “gate driver-free”, “built-in gate driver in panel”, and “gate in panel”.
A TFT using amorphous silicon requires high driving voltage due to its low mobility. Moreover, in order to charge interconnect capacitance of scanning signal lines with scanning pulses, there is no other alternative but to manufacture the TFT so as to have a considerably large channel width in the order of millimeters or centimeters.
FIG. 8 is a plane view illustrating a structure of such a TFT disclosed in Patent Literature 1. The TFT is manufactured with use of amorphous silicon and includes a gate electrode line 310, a drain electrode line 330, and a source electrode line 350.
The drain electrode line 330 is composed of a body drain electrode line 332 extending from the outside of the gate electrode line 310, hand drain electrode lines 334 that branch off from the body drain electrode line 332, and finger drain electrode lines 336 that perpendicularly branch off from the hand drain electrode lines 334. The hand drain electrode lines 334 are formed in a region where the gate electrode line 310 is not formed, while the finger drain electrode lines 336 are formed in a region where the gate electrode line 310 is formed.
The source electrode line 350 is composed of a body source electrode line 352 extended from the outside of the gate electrode line 310, hand source electrode lines 354 that branch off from the body source electrode line 352, and finger source electrode lines 356 that perpendicularly branch off from the hand source electrode lines 354. The hand source electrode lines 354 are formed in a region where the gate electrode line 310 is not formed, and the finger source electrode lines 356 are formed in a region where the gate electrode line 310 is formed.
In the above-described TFT, the I-shaped finger drain electrode lines 336 are respectively surrounded by the U-shaped finger source electrode lines 356, so that a channel is formed therebetween.
FIG. 9 illustrates a structure also disclosed in Patent Literature 1. This structure can be used as a partial TFT region 200 in which one finger drain electrode line 336 is surrounded by the U-shaped finger source electrode lines 356. Note that, in FIG. 9, the partial TFT region 200 is composed of a gate electrode line indicated by a reference numeral 210, a source electrode line indicated by a reference numeral 230, and a drain electrode line indicated by a reference numeral 240. In the structure in FIG. 8, the gate electrode line 210 extends continuously to other partial TFT regions 200 along the extending direction of the hand drain electrode lines 334 and the hand source electrode lines 354. In FIG. 9, a channel width W is expressed by 2×DL1+DL2. This is an average distance of (i) a length of a borderline between the source electrode line 230 and the channel region and (ii) a length of a borderline between the drain electrode line 240 and the channel region. A channel length L is a distance between (i′) the borderline between the source electrode line 230 and the channel region and (ii′) the borderline between the drain electrode line 240 and the channel region. In Patent Literature 1, a large number of such partial TFT regions 200 are connected in parallel. This keeps parasitic capacitance between the gate electrode and the drain electrode low, while realizing a very large channel width W.